pytket.circuit.logic_exp
pytket.circuit.logic_exp#
For more discussion of classical logic in pytket see the manual section.
Classes and functions for constructing logical expressions over Bit and BitRegister.
- class pytket.circuit.logic_exp.And(arg1: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int], arg2: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- eval_vals() Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int] #
Attempt to evaluate all sub-expressions; simple constant folding.
- class pytket.circuit.logic_exp.BinaryOp(arg1: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int], arg2: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
Expresion for operation on two arguments.
- class pytket.circuit.logic_exp.BitAnd(arg1: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int], arg2: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- class pytket.circuit.logic_exp.BitEq(arg1: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int], arg2: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- class pytket.circuit.logic_exp.BitLogicExp(op: Union[pytket.circuit.logic_exp.BitWiseOp, pytket.circuit.logic_exp.RegWiseOp], args: List[Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int]])#
Expression acting only on Bit or Constant types.
- class pytket.circuit.logic_exp.BitNeq(arg1: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int], arg2: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- class pytket.circuit.logic_exp.BitNot(arg: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- class pytket.circuit.logic_exp.BitOr(arg1: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int], arg2: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- eval_vals() Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int] #
Attempt to evaluate all sub-expressions; simple constant folding.
- class pytket.circuit.logic_exp.BitWiseOp(value)#
Enum for operations on Bit.
- class pytket.circuit.logic_exp.BitXor(arg1: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int], arg2: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- pytket.circuit.logic_exp.ConstPredicate#
- class pytket.circuit.logic_exp.Eq(arg1: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int], arg2: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- class pytket.circuit.logic_exp.LogicExp(op: Union[pytket.circuit.logic_exp.BitWiseOp, pytket.circuit.logic_exp.RegWiseOp], args: List[Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int]])#
Logical expressions over Bit or BitRegister. Encoded as a tree of expressions
- all_inputs() Set[Union[pytket.circuit.Bit, pytket.circuit.BitRegister]] #
- Returns
All variables involved in expression.
- Return type
Set[Variable]
- eval_vals() Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int] #
Attempt to evaluate all sub-expressions; simple constant folding.
- classmethod factory(op: Union[pytket.circuit.logic_exp.BitWiseOp, pytket.circuit.logic_exp.RegWiseOp]) Type[pytket.circuit.logic_exp.LogicExp] #
Return matching operation class for enum.
- classmethod from_dict(dic: Dict[str, Any]) pytket.circuit.logic_exp.LogicExp #
Load from JSON serializable nested dictionary.
- rename_args(cmap: Dict[pytket.circuit.Bit, pytket.circuit.Bit]) bool #
Rename the Bits according to a Bit map. Raise ValueError if a bit is being used in a register-wise expression.
- set_value(var: Union[pytket.circuit.Bit, pytket.circuit.BitRegister], val: int) None #
Set value of var to val recursively.
- class pytket.circuit.logic_exp.Neq(arg1: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int], arg2: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- class pytket.circuit.logic_exp.Or(arg1: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int], arg2: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- class pytket.circuit.logic_exp.PredicateExp(arg1: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int], arg2: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
A binary predicate where the arguments are either Bits, BitRegisters, or Constants.
- class pytket.circuit.logic_exp.RegAdd(arg1: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int], arg2: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- class pytket.circuit.logic_exp.RegAnd(arg1: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int], arg2: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- class pytket.circuit.logic_exp.RegDiv(arg1: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int], arg2: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- class pytket.circuit.logic_exp.RegEq(arg1: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int], arg2: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- class pytket.circuit.logic_exp.RegGeq(arg1: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int], arg2: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- class pytket.circuit.logic_exp.RegGt(arg1: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int], arg2: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- class pytket.circuit.logic_exp.RegLeq(arg1: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int], arg2: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- class pytket.circuit.logic_exp.RegLogicExp(op: Union[pytket.circuit.logic_exp.BitWiseOp, pytket.circuit.logic_exp.RegWiseOp], args: List[Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int]])#
Expression acting only on BitRegister or Constant types.
- class pytket.circuit.logic_exp.RegLsh(arg1: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int], arg2: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- class pytket.circuit.logic_exp.RegLt(arg1: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int], arg2: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- class pytket.circuit.logic_exp.RegMul(arg1: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int], arg2: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- class pytket.circuit.logic_exp.RegNeg(arg: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- class pytket.circuit.logic_exp.RegNeq(arg1: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int], arg2: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- class pytket.circuit.logic_exp.RegNot(arg: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- class pytket.circuit.logic_exp.RegOr(arg1: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int], arg2: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- class pytket.circuit.logic_exp.RegPow(arg1: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int], arg2: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- class pytket.circuit.logic_exp.RegRsh(arg1: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int], arg2: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- class pytket.circuit.logic_exp.RegSub(arg1: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int], arg2: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- class pytket.circuit.logic_exp.RegWiseOp(value)#
Enum for operations on BitRegister.
- class pytket.circuit.logic_exp.RegXor(arg1: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int], arg2: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- class pytket.circuit.logic_exp.UnaryOp(arg: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
Expression for operation on one argument.
- class pytket.circuit.logic_exp.Xor(arg1: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int], arg2: Union[pytket.circuit.logic_exp.LogicExp, pytket.circuit.Bit, pytket.circuit.BitRegister, int])#
- pytket.circuit.logic_exp.filter_by_type(seq: Iterable, var_type: Type[pytket.circuit.logic_exp.T]) Iterator[Tuple[int, pytket.circuit.logic_exp.T]] #
Return enumeration of seq, with only elements of type var_type.
- pytket.circuit.logic_exp.if_bit(bit: Union[pytket.circuit.Bit, pytket.circuit.logic_exp.BitLogicExp]) pytket.circuit.logic_exp.PredicateExp #
Equivalent of
if bit:
.
- pytket.circuit.logic_exp.if_not_bit(bit: Union[pytket.circuit.Bit, pytket.circuit.logic_exp.BitLogicExp]) pytket.circuit.logic_exp.PredicateExp #
Equivalent of
if not bit:
.
- pytket.circuit.logic_exp.reg_eq(register: Union[pytket.circuit.logic_exp.RegLogicExp, pytket.circuit.BitRegister], value: int) pytket.circuit.logic_exp.PredicateExp #
Function to express a BitRegister equality predicate, i.e. for a register
r
,(r == 5)
is expressed asreg_eq(r, 5)
- pytket.circuit.logic_exp.reg_geq(register: Union[pytket.circuit.logic_exp.RegLogicExp, pytket.circuit.BitRegister], value: int) pytket.circuit.logic_exp.PredicateExp #
Function to express a BitRegister greater than or equal to predicate, i.e. for a register
r
,(r >= 5)
is expressed asreg_geq(r, 5)
- pytket.circuit.logic_exp.reg_gt(register: Union[pytket.circuit.logic_exp.RegLogicExp, pytket.circuit.BitRegister], value: int) pytket.circuit.logic_exp.PredicateExp #
Function to express a BitRegister greater than predicate, i.e. for a register
r
,(r > 5)
is expressed asreg_gt(r, 5)
- pytket.circuit.logic_exp.reg_leq(register: Union[pytket.circuit.logic_exp.RegLogicExp, pytket.circuit.BitRegister], value: int) pytket.circuit.logic_exp.PredicateExp #
Function to express a BitRegister less than or equal to predicate, i.e. for a register
r
,(r <= 5)
is expressed asreg_leq(r, 5)
- pytket.circuit.logic_exp.reg_lt(register: Union[pytket.circuit.logic_exp.RegLogicExp, pytket.circuit.BitRegister], value: int) pytket.circuit.logic_exp.PredicateExp #
Function to express a BitRegister less than predicate, i.e. for a register
r
,(r < 5)
is expressed asreg_lt(r, 5)
- pytket.circuit.logic_exp.reg_neq(register: Union[pytket.circuit.logic_exp.RegLogicExp, pytket.circuit.BitRegister], value: int) pytket.circuit.logic_exp.PredicateExp #
Function to express a BitRegister inequality predicate, i.e. for a register
r
,(r != 5)
is expressed asreg_neq(r, 5)