GCC Code Coverage Report

Directory: ./
File: Transformations/CliffordOptimisation.cpp
Date: 2022-10-15 05:10:18
Warnings: 2 unchecked decisions!
Exec Total Coverage
Lines: 457 477 95.8%
Functions: 8 8 100.0%
Branches: 624 1013 61.6%
Decisions: 16 20 80.0%
Line Branch Decision Exec Source
1 // Copyright 2019-2022 Cambridge Quantum Computing
2 //
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
6 //
7 // http://www.apache.org/licenses/LICENSE-2.0
8 //
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
14
15 #include "CliffordOptimisation.hpp"
16
17 #include <vector>
18
19 #include "BasicOptimisation.hpp"
20 #include "Circuit/CircPool.hpp"
21 #include "Circuit/DAGDefs.hpp"
22 #include "Decomposition.hpp"
23 #include "Transform.hpp"
24
25 namespace tket {
26
27 namespace Transforms {
28
29 static bool multiq_clifford_match(Circuit &circ, bool allow_swaps);
30 static bool copy_pi_through_CX_method(Circuit &circ);
31
32 16 Transform multiq_clifford_replacement(bool allow_swaps) {
33 16 return Transform([allow_swaps](Circuit &circ) {
34 16 return multiq_clifford_match(circ, allow_swaps);
35
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 16 });
36 }
37
38 16 static bool multiq_clifford_match(Circuit &circ, bool allow_swaps) {
39 16 bool success = false;
40 // map from vertex/port to qubit number
41
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 16 std::map<Vertex, unit_set_t> v_to_qb = circ.vertex_unit_map();
42 // map from vertex to its depth from slices/reverse_slices
43
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 16 std::map<Vertex, unsigned> v_to_depth = circ.vertex_depth_map();
44
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 16 std::map<Vertex, unsigned> v_to_rev_depth = circ.vertex_rev_depth_map();
45 // Analysis complete, we can now go through and actually do the transformation
46 16 VertexList bin;
47
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 345 BGL_FORALL_VERTICES(v, circ.dag, DAG) {
48
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 389 if (circ.get_OpType_from_Vertex(v) == OpType::CX &&
49
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 76 circ.n_out_edges(v) == 2) {
50 // Walk to next CX on the same pair
51
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 56 unit_set_t cx_units = v_to_qb.at(v);
52
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 56 qubit_vector_t qbs(cx_units.begin(), cx_units.end());
53 56 QPathDetailed path0;
54 56 QPathDetailed path1;
55 56 bool found_cnot = false;
56
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 56 Edge e0 = circ.get_nth_out_edge(v, 0);
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 56 Vertex v0 = circ.target(e0);
58
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 56 port_t port = circ.get_target_port(e0);
59 while (true) {
60
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 135 OpType v_type = circ.get_OpType_from_Vertex(v0);
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 135 if (is_final_q_type(v_type)) {
62 27 break;
63
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 108 } else if (v_type == OpType::CX && v_to_qb.at(v0) == cx_units) {
64 29 found_cnot = true;
65 29 break;
66 }
67
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 79 path0.push_back({v0, port});
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 79 e0 = circ.get_next_edge(v0, e0);
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 79 v0 = circ.target(e0);
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 79 port = circ.get_target_port(e0);
71 79 }
72
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 56 if (!found_cnot) {
73 27 continue;
74 }
75
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 29 Edge e1 = circ.get_nth_out_edge(v, 1);
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 29 Vertex v1 = circ.target(e1);
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 84 while (v1 != v0) {
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 55 path1.push_back({v1, circ.get_target_port(e1)});
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 55 e1 = circ.get_next_edge(v1, e1);
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 55 v1 = circ.target(e1);
81 }
82 29 unsigned path0_length = path0.size();
83 29 unsigned path1_length = path1.size();
84 29 unsigned front0_index = 0;
85 29 unsigned front1_index = 0;
86
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 55 while (front0_index < path0_length &&
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 22 circ.commutes_with_basis(
88
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 55 path0[front0_index].first, Pauli::Z, PortType::Target,
89 22 path0[front0_index].second)) {
90 4 front0_index++;
91 }
92
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 64 while (front1_index < path1_length &&
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 26 circ.commutes_with_basis(
94
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 64 path1[front1_index].first, Pauli::X, PortType::Target,
95 26 path1[front1_index].second)) {
96 9 front1_index++;
97 }
98
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 29 if (port == 0) {
99 // CXs have same orientation
100 // We walk back from the end of the path
101 // unsigned is used as this is semantically an index and the check for
102 // -1 functions the same as if it were signed
103 14 unsigned back0_index = path0_length - 1;
104
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 21 while (back0_index != front0_index && back0_index != (unsigned)-1 &&
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 4 circ.commutes_with_basis(
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 21 path0[back0_index].first, Pauli::Z, PortType::Target,
107 4 path0[back0_index].second)) {
108 3 back0_index--;
109 }
110 14 unsigned back1_index = path1_length - 1;
111
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 30 while (back1_index != front1_index && back1_index != (unsigned)-1 &&
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 9 circ.commutes_with_basis(
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 30 path1[back1_index].first, Pauli::X, PortType::Target,
114 9 path1[back1_index].second)) {
115 7 back1_index--;
116 }
117 // Check for valid causal ordering
118 Vertex front0pre =
119
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 14 (front0_index == 0) ? v : path0[front0_index - 1].first;
120 Vertex front0post =
121
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 14 (front0_index == path0_length) ? v0 : path0[front0_index].first;
122 Vertex front1pre =
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 14 (front1_index == 0) ? v : path1[front1_index - 1].first;
124 Vertex front1post =
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 14 (front1_index == path1_length) ? v0 : path1[front1_index].first;
126 Vertex back0pre =
127
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 14 (back0_index == (unsigned)-1) ? v : path0[back0_index].first;
128 14 Vertex back0post = (back0_index == path0_length - 1)
129
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 16 ? v0
130 2 : path0[back0_index + 1].first;
131 Vertex back1pre =
132
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 14 (back1_index == (unsigned)-1) ? v : path1[back1_index].first;
133 14 Vertex back1post = (back1_index == path1_length - 1)
134
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 18 ? v0
135 4 : path1[back1_index + 1].first;
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 14 if (circ.in_causal_order(
137 front1pre, front0post, true, v_to_depth, v_to_qb))
138 4 continue;
139
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 13 if (circ.in_causal_order(
140 front0pre, front1post, true, v_to_depth, v_to_qb))
141 ✗ continue;
142
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 13 if (circ.in_causal_order(
143 back1post, back0pre, false, v_to_rev_depth, v_to_qb))
144 ✗ continue;
145
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 13 if (circ.in_causal_order(
146 back0post, back1pre, false, v_to_rev_depth, v_to_qb))
147 1 continue;
148 // Identify which pattern to replace
149 12 bool v_on_q0 = false;
150
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 12 if (front0_index != path0_length) {
151
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 5 if (circ.get_OpType_from_Vertex(path0[front0_index].first) !=
152 OpType::V) {
153 // The only non-empty pattern we can recognise is from a V
154 ✗ continue;
155 }
156 5 v_on_q0 = true;
157
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 5 if (back0_index != front0_index) {
158 // There are some ops after the V that we cannot commute past the CX
159 ✗ continue;
160 }
161 }
162 12 bool s_on_q1 = false;
163
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 12 if (front1_index != path1_length) {
164
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 6 if (circ.get_OpType_from_Vertex(path1[front1_index].first) !=
165 OpType::S) {
166 // The only non-empty pattern we can recognise is from a S
167 1 continue;
168 }
169 5 s_on_q1 = true;
170 11 if (back1_index == front1_index + 2 &&
171
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 1 circ.get_OpType_from_Vertex(path1[front1_index + 1].first) ==
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 6 OpType::V &&
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 1 circ.get_OpType_from_Vertex(path1[front1_index + 2].first) ==
174 OpType::S) {
175 /* --C-- ... --C-- --C-- ... --C-- */
176 /* | | => | | */
177 /* --X--S--V--S--X-- --X--V--S--V--X-- */
178
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 1 circ.dag[path1[front1_index].first] = {get_op_ptr(OpType::V)};
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 1 circ.dag[path1[front1_index + 1].first] = {get_op_ptr(OpType::S)};
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 1 circ.dag[path1[front1_index + 2].first] = {get_op_ptr(OpType::V)};
181
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 1 circ.add_phase(0.25);
182 1 front1_index++;
183 1 back1_index--;
184
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 4 } else if (back1_index != front1_index) {
185 // There are some ops after the S that we cannot commute past the CX
186 ✗ continue;
187 }
188 }
189
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 11 if (!allow_swaps && v_on_q0 && s_on_q1) {
190 ✗ continue;
191 }
192 11 success = true;
193 // Always remove the CX pair, saving the new edges from the second
194
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 11 Edge next_e0 = circ.get_nth_out_edge(v0, 0);
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 11 Edge next_e1 = circ.get_nth_out_edge(v0, 1);
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 11 Vertex next_v0 = circ.target(next_e0);
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 11 Vertex next_v1 = circ.target(next_e1);
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 11 port_t next_p0 = circ.get_target_port(next_e0);
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 11 port_t next_p1 = circ.get_target_port(next_e1);
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 11 bin.push_back(v);
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 11 bin.push_back(v0);
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 11 circ.remove_vertex(
203 v, Circuit::GraphRewiring::Yes, Circuit::VertexDeletion::No);
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 11 circ.remove_vertex(
205 v0, Circuit::GraphRewiring::Yes, Circuit::VertexDeletion::No);
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 11 Edge default_h0 = circ.get_nth_in_edge(next_v0, next_p0);
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 11 Edge default_h1 = circ.get_nth_in_edge(next_v1, next_p1);
208
209 11 Subcircuit sub;
210 const Circuit *replacement;
211
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 11 Qubit q0, q1;
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 11 if (v_on_q0) {
213 5 Vertex v_gate = path0[front0_index].first;
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 5 q0 = Qubit(*v_to_qb.at(v_gate).begin());
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 5 q1 = qbs.at(0);
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 5 if (q0 == q1) q1 = qbs.at(1);
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 5 if (s_on_q1) {
218 /* --C--V--C-- --Z--S--V--X--S--\ /-- */
219 /* | | => | \ */
220 /* --X--S--X-- --X--V--S--C--V--/ \-- */
221 ✗ Vertex s_gate = path1[front1_index].first;
222 ✗ bin.push_back(v_gate);
223 ✗ bin.push_back(s_gate);
224 sub = {
225 ✗ {circ.get_nth_in_edge(v_gate, 0),
226 ✗ circ.get_nth_in_edge(s_gate, 0)},
227 ✗ {circ.get_nth_out_edge(v_gate, 0),
228 ✗ circ.get_nth_out_edge(s_gate, 0)},
229 ✗ {v_gate, s_gate}};
230 ✗ replacement = &CircPool::CX_VS_CX_reduced();
231 } else {
232 /* --C--V--C-- --X--V--S--V--C--V--S-- */
233 /* | | => | */
234 /* --X-----X-- --V-----------X-------- */
235
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 5 bin.push_back(v_gate);
236 sub = {
237
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 5 {circ.get_nth_in_edge(v_gate, 0), default_h1},
238
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 5 {circ.get_nth_out_edge(v_gate, 0), default_h1},
239
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 10 {v_gate}};
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 5 replacement = &CircPool::CX_V_CX_reduced();
241 }
242
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 6 } else if (s_on_q1) {
243 /* --C-----C-- --S-----------C-------- */
244 /* | | => | */
245 /* --X--S--X-- --Z--S--V--S--X--S--V-- */
246 5 Vertex s_gate = path1[front1_index].first;
247
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 5 q1 = Qubit(*v_to_qb.at(s_gate).begin());
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 5 q0 = qbs.at(0);
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 5 if (q0 == q1) q0 = qbs.at(1);
250
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 5 bin.push_back(s_gate);
251 sub = {
252 ✗ {default_h0, circ.get_nth_in_edge(s_gate, 0)},
253 ✗ {default_h0, circ.get_nth_out_edge(s_gate, 0)},
254
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 5 {s_gate}};
255
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 5 replacement = &CircPool::CX_S_CX_reduced();
256 } else {
257 /* --C--C-- ---- */
258 /* | | => */
259 /* --X--X-- ---- */
260 1 continue;
261 }
262
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 10 Vertex b0 = circ.source(sub.q_in_hole[0]);
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 10 port_t p0 = circ.get_source_port(sub.q_in_hole[0]);
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 10 Vertex b1 = circ.source(sub.q_in_hole[1]);
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 10 port_t p1 = circ.get_source_port(sub.q_in_hole[1]);
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 10 Vertex a0 = circ.target(sub.q_out_hole[0]);
267
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 10 Vertex a1 = circ.target(sub.q_out_hole[1]);
268
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 10 circ.substitute(*replacement, sub, Circuit::VertexDeletion::No);
269 // Scan through hole and add vertices to v_to_qb
270 // and give estimates of depth and rev_depth
271
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 10 unsigned new_depth = std::min(v_to_depth[a0], v_to_depth[a1]);
272 unsigned new_rev_depth =
273
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 10 std::min(v_to_rev_depth[b0], v_to_rev_depth[b1]);
274
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 10 Edge ei0 = circ.get_nth_out_edge(b0, p0);
275
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 10 Vertex vi0 = circ.target(ei0);
276
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 55 while (vi0 != a0) {
277
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 90 v_to_qb.insert({vi0, {q0}});
278
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 45 v_to_depth[vi0] = new_depth;
279
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 45 v_to_rev_depth[vi0] = new_rev_depth;
280
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 45 ei0 = circ.get_next_edge(vi0, ei0);
281
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 45 vi0 = circ.target(ei0);
282 }
283
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 10 Edge ei1 = circ.get_nth_out_edge(b1, p1);
284
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 10 Vertex vi1 = circ.target(ei1);
285
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 55 while (vi1 != a1) {
286
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 45 if (v_to_qb.find(vi1) == v_to_qb.end())
287
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 70 v_to_qb.insert({vi1, {q1}});
288 else
289
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 10 v_to_qb.at(vi1).insert(q1);
290
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 45 v_to_depth[vi1] = new_depth;
291
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 45 v_to_rev_depth[vi1] = new_rev_depth;
292
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 45 ei1 = circ.get_next_edge(vi1, ei1);
293
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 45 vi1 = circ.target(ei1);
294 }
295
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 13 } else {
296 // CXs have different orientation
297 15 unsigned back0_index = path0_length - 1;
298
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 36 while (back0_index >= front0_index && back0_index != (unsigned)-1 &&
299
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 15 circ.commutes_with_basis(
300
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 36 path0[back0_index].first, Pauli::X, PortType::Target,
301 15 path0[back0_index].second)) {
302 6 back0_index--;
303 }
304 15 unsigned back1_index = path1_length - 1;
305
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 32 while (back1_index >= front1_index && back1_index != (unsigned)-1 &&
306
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 13 circ.commutes_with_basis(
307
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 32 path1[back1_index].first, Pauli::Z, PortType::Target,
308 13 path1[back1_index].second)) {
309 4 back1_index--;
310 }
311 Vertex front0pre =
312
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 15 (front0_index == 0) ? v : path0[front0_index - 1].first;
313 Vertex front0post =
314
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 15 (front0_index == path0_length) ? v0 : path0[front0_index].first;
315 Vertex front1pre =
316
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 15 (front1_index == 0) ? v : path1[front1_index - 1].first;
317 Vertex front1post =
318
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 15 (front1_index == path1_length) ? v0 : path1[front1_index].first;
319 Vertex back0pre =
320
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 15 (back0_index == (unsigned)-1) ? v : path0[back0_index].first;
321 15 Vertex back0post = (back0_index == path0_length - 1)
322
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 19 ? v0
323 4 : path0[back0_index + 1].first;
324 Vertex back1pre =
325
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 15 (back1_index == (unsigned)-1) ? v : path1[back1_index].first;
326 15 Vertex back1post = (back1_index == path1_length - 1)
327
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 18 ? v0
328 3 : path1[back1_index + 1].first;
329
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 15 if (circ.in_causal_order(
330 front1pre, front0post, true, v_to_depth, v_to_qb))
331 8 continue;
332
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 14 if (circ.in_causal_order(
333 front0pre, front1post, true, v_to_depth, v_to_qb))
334 ✗ continue;
335
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 14 if (circ.in_causal_order(
336 back1post, back0pre, false, v_to_rev_depth, v_to_qb))
337 ✗ continue;
338
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 14 if (circ.in_causal_order(
339 back0post, back1pre, false, v_to_rev_depth, v_to_qb))
340 ✗ continue;
341 // Identify which pattern
342 14 bool vs_on_q0 = false;
343
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 14 if (back0_index >= front0_index && back0_index != (unsigned)-1) {
344
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 17 if (!(back0_index == front0_index + 1 &&
345
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 8 circ.get_OpType_from_Vertex(path0[front0_index].first) ==
346 OpType::V &&
347
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 6 circ.get_OpType_from_Vertex(path0[back0_index].first) ==
348 OpType::S)) {
349 // The only non-empty pattern we can recognise is from VS
350 3 continue;
351 }
352 6 vs_on_q0 = true;
353 }
354 11 bool sv_on_q1 = false;
355
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 11 if (back1_index >= front1_index && back1_index != (unsigned)-1) {
356
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 11 if (!(back1_index == front1_index + 1 &&
357
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 5 circ.get_OpType_from_Vertex(path1[front1_index].first) ==
358 OpType::S &&
359
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 5 circ.get_OpType_from_Vertex(path1[back1_index].first) ==
360 OpType::V)) {
361 // The only non-empty pattern we can recognise is from SV
362 1 continue;
363 }
364 5 sv_on_q1 = true;
365 }
366
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 10 if (!allow_swaps && !vs_on_q0 && !sv_on_q1) {
367 1 continue;
368 }
369 9 success = true;
370 // Always remove the CX pair, saving the edges to insert the replacement
371 // circuit
372 Vertex before0, before1, after0, after1;
373 port_t pb0, pb1, pa0, pa1;
374
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 9 if (front0_index > 0) {
375 1 before0 = path0[front0_index - 1].first;
376 1 pb0 = path0[front0_index - 1].second;
377 } else {
378
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 8 Edge pre0 = circ.get_nth_in_edge(v, 0);
379
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 8 before0 = circ.source(pre0);
380
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 8 pb0 = circ.get_source_port(pre0);
381 }
382
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 9 if (front1_index > 0) {
383 1 before1 = path1[front1_index - 1].first;
384 1 pb1 = path1[front1_index - 1].second;
385 } else {
386
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 8 Edge pre1 = circ.get_nth_in_edge(v, 1);
387
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 8 before1 = circ.source(pre1);
388
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 8 pb1 = circ.get_source_port(pre1);
389 }
390
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 9 if (back0_index + 1 < path0_length) {
391 2 after0 = path0[back0_index + 1].first;
392 2 pa0 = path0[back0_index + 1].second;
393 } else {
394
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 7 Edge post0 = circ.get_nth_out_edge(v0, 1);
395
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 7 after0 = circ.target(post0);
396
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 7 pa0 = circ.get_target_port(post0);
397 }
398
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 9 if (back1_index + 1 < path1_length) {
399 2 after1 = path1[back1_index + 1].first;
400 2 pa1 = path1[back1_index + 1].second;
401 } else {
402
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 7 Edge post1 = circ.get_nth_out_edge(v0, 0);
403
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 7 after1 = circ.target(post1);
404
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 7 pa1 = circ.get_target_port(post1);
405 }
406
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 9 bin.push_back(v);
407
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 9 bin.push_back(v0);
408
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 9 circ.remove_vertex(
409 v, Circuit::GraphRewiring::Yes, Circuit::VertexDeletion::No);
410
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 9 circ.remove_vertex(
411 v0, Circuit::GraphRewiring::Yes, Circuit::VertexDeletion::No);
412 9 VertexSet to_remove;
413 const Circuit *replacement;
414
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 9 Qubit q0, q1;
415
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 9 if (vs_on_q0) {
416 5 Vertex v_gate = path0[front0_index].first;
417
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 5 q0 = Qubit(*v_to_qb.at(v_gate).begin());
418
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 5 q1 = qbs.at(0);
419
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 5 if (q0 == q1) q1 = qbs.at(1);
420
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 5 if (sv_on_q1) {
421 /* --C--V--S--X-- --V--S-- */
422 /* | | => */
423 /* --X--S--V--C-- --S--V-- */
424 2 continue;
425 } else {
426 /* --C--V--S--X-- --S-----C--V--S-- */
427 /* | | => | */
428 /* --X--------C-- --Z--S--X--S----- */
429
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 3 replacement = &CircPool::CX_V_S_XC_reduced();
430 }
431
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 3 bin.push_back(path0[front0_index].first);
432
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 3 bin.push_back(path0[back0_index].first);
433
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 3 to_remove.insert(path0[front0_index].first);
434
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 3 to_remove.insert(path0[back0_index].first);
435
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 4 } else if (sv_on_q1) {
436 /* --C--------X-- --X--V--C--V----- */
437 /* | | => | */
438 /* --X--S--V--C-- --V-----X--S--V-- */
439 3 Vertex s_gate = path1[front1_index].first;
440
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 3 q1 = Qubit(*v_to_qb.at(s_gate).begin());
441
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 3 q0 = qbs.at(0);
442
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 3 if (q0 == q1) q0 = qbs.at(1);
443
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 3 replacement = &CircPool::CX_S_V_XC_reduced();
444
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 3 bin.push_back(path1[front1_index].first);
445
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 3 bin.push_back(path1[back1_index].first);
446
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 3 to_remove.insert(path1[front1_index].first);
447
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 3 to_remove.insert(path1[back1_index].first);
448 } else {
449 /* --C--X-- --X--\ /-- */
450 /* | | => | \ */
451 /* --X--C-- --C--/ \-- */
452
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 1 q0 = qbs.at(0);
453
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 1 q1 = qbs.at(1);
454
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 1 replacement = &CircPool::CX_XC_reduced();
455 }
456 Subcircuit sub = {
457
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 7 {circ.get_nth_out_edge(before0, pb0),
458
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 7 circ.get_nth_out_edge(before1, pb1)},
459
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 7 {circ.get_nth_in_edge(after0, pa0),
460
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 7 circ.get_nth_in_edge(after1, pa1)},
461
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 21 to_remove};
462
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 7 Vertex b0 = circ.source(sub.q_in_hole[0]);
463
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 7 port_t p0 = circ.get_source_port(sub.q_in_hole[0]);
464
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 7 Vertex b1 = circ.source(sub.q_in_hole[1]);
465
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 7 port_t p1 = circ.get_source_port(sub.q_in_hole[1]);
466
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 7 Vertex a0 = circ.target(sub.q_out_hole[0]);
467
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 7 Vertex a1 = circ.target(sub.q_out_hole[1]);
468
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 7 circ.substitute(*replacement, sub, Circuit::VertexDeletion::No);
469 // Scan through hole and add vertices to v_to_qb
470
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 7 unsigned new_depth = std::min(v_to_depth[a0], v_to_depth[a1]);
471 unsigned new_rev_depth =
472
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 7 std::min(v_to_rev_depth[b0], v_to_rev_depth[b1]);
473
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 7 Edge ei0 = circ.get_nth_out_edge(b0, p0);
474
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 7 Vertex vi0 = circ.target(ei0);
475
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 33 while (vi0 != a0) {
476
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 52 v_to_qb.insert({vi0, {q0}});
477
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 26 v_to_depth[vi0] = new_depth;
478
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 26 v_to_rev_depth[vi0] = new_rev_depth;
479
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 26 ei0 = circ.get_next_edge(vi0, ei0);
480
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 26 vi0 = circ.target(ei0);
481 }
482
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 7 Edge ei1 = circ.get_nth_out_edge(b1, p1);
483
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 7 Vertex vi1 = circ.target(ei1);
484
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 33 while (vi1 != a1) {
485
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 26 if (v_to_qb.find(vi1) == v_to_qb.end())
486
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 36 v_to_qb.insert({vi1, {q1}});
487 else
488
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 8 v_to_qb.at(vi1).insert(q1);
489
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 26 v_to_depth[vi1] = new_depth;
490
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 26 v_to_rev_depth[vi1] = new_rev_depth;
491
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 26 ei1 = circ.get_next_edge(vi1, ei1);
492
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 26 vi1 = circ.target(ei1);
493 }
494
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 13 }
495
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 173 }
496 }
497
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 16 if (allow_swaps) {
498
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 2 circ.replace_SWAPs();
499 }
500
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 16 circ.remove_vertices(
501 bin, Circuit::GraphRewiring::No, Circuit::VertexDeletion::Yes);
502 16 return success;
503 16 }
504
505
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 5 Transform copy_pi_through_CX() { return Transform(copy_pi_through_CX_method); }
506
507 // TODO:: Copy classical-controls and any controls from CX
508 5 static bool copy_pi_through_CX_method(Circuit &circ) {
509 5 bool success = false;
510 5 VertexList bin;
511
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 51 BGL_FORALL_VERTICES(vert, circ.dag, DAG) {
512
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 50 if (circ.get_OpType_from_Vertex(vert) == OpType::CX &&
513
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 9 circ.n_out_edges(vert) == 2) {
514
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 9 Edge e0 = circ.get_nth_out_edge(vert, 0);
515
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 9 Vertex v0 = circ.target(e0);
516
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 9 if (circ.get_OpType_from_Vertex(v0) == OpType::X) {
517 2 success = true;
518
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 2 Edge afterX = circ.get_next_edge(v0, e0);
519
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 2 Edge after1 = circ.get_nth_out_edge(vert, 1);
520
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 2 Vertex v_after1 = circ.target(after1);
521
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 2 port_t pa1 = circ.get_target_port(after1);
522
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 2 bin.push_back(vert);
523
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 2 circ.remove_vertex(
524 vert, Circuit::GraphRewiring::Yes, Circuit::VertexDeletion::No);
525
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 2 after1 = circ.get_nth_in_edge(v_after1, pa1);
526
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 4 Subcircuit sub = {{afterX, after1}, {afterX, after1}};
527
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 2 circ.substitute(CircPool::X1_CX(), sub, Circuit::VertexDeletion::No);
528 2 continue;
529 2 }
530
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 7 Edge e1 = circ.get_nth_out_edge(vert, 1);
531
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 7 Vertex v1 = circ.target(e1);
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 7 if (circ.get_OpType_from_Vertex(v1) == OpType::Z) {
533 1 success = true;
534
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 1 Edge afterZ = circ.get_next_edge(v1, e1);
535
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 1 Edge after0 = circ.get_nth_out_edge(vert, 0);
536
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 1 Vertex v_after0 = circ.target(after0);
537
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 1 port_t pa0 = circ.get_target_port(after0);
538
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 1 bin.push_back(vert);
539
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 1 circ.remove_vertex(
540 vert, Circuit::GraphRewiring::Yes, Circuit::VertexDeletion::No);
541
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 1 after0 = circ.get_nth_in_edge(v_after0, pa0);
542
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 2 Subcircuit sub = {{after0, afterZ}, {after0, afterZ}};
543
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 1 circ.substitute(CircPool::Z0_CX(), sub, Circuit::VertexDeletion::No);
544 1 }
545 }
546 }
547
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 5 circ.remove_vertices(
548 bin, Circuit::GraphRewiring::No, Circuit::VertexDeletion::Yes);
549 5 return success;
550 5 }
551
552 // TODO:: Detect classical controls and stop simplification
553 3530 static bool singleq_clifford_from_edge(
554 Circuit &circ, Edge &e, VertexList &bin) {
555 3530 VertexSet single_vs;
556 3530 Edge ei = e;
557
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 3530 Vertex vi = circ.target(ei);
558 // stuff to check if it is already in standard form
559 // 6 = not consumed anything, 5=Z, 4=X, 3=first S, 2=V, 1=second S, 0=other
560 3530 unsigned cliff_last = 6;
561
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 19160 while (circ.detect_singleq_unitary_op(vi)) {
562 // i.e. we have a single qubit unitary
563
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 15630 single_vs.insert(vi);
564
565 // keep track of clifford standard form
566
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 15630 switch (circ.get_OpType_from_Vertex(vi)) {
567 2027 case OpType::Z: {
568
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 2027 cliff_last = (cliff_last > 5) ? 5 : 0;
569 2027 break;
570 }
571 2831 case OpType::X: {
572
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 2831 cliff_last = (cliff_last > 4) ? 4 : 0;
573 2831 break;
574 }
575 3296 case OpType::S: {
576
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 3296 if (cliff_last > 3)
577 633 cliff_last = 3;
578
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 2663 else if (cliff_last == 2)
579 641 cliff_last = 1;
580 else
581 2022 cliff_last = 0;
582 3296 break;
583 }
584 3646 case OpType::V: {
585
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 3646 cliff_last = (cliff_last > 2) ? 2 : 0;
586 3646 break;
587 }
588 3830 default: {
589 3830 cliff_last = 0;
590 3830 break;
591 }
592 }
593
594
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 15630 ei = circ.get_next_edge(vi, ei);
595
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 15630 vi = circ.target(ei);
596 }
597 // if the sequence is not in the standard form, replace it
598
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 3530 if (cliff_last == 0) {
599
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 5004 Subcircuit s = {{e}, {ei}, single_vs};
600
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 2502 Circuit sub = circ.subcircuit(s);
601
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 7506 bool reduced = (decompose_single_qubits_TK1() >> squash_1qb_to_tk1() >>
602
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 5004 decompose_cliffords_std())
603
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 2502 .apply(sub);
604
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 2502 if (reduced) {
605
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 2502 circ.substitute(sub, s, Circuit::VertexDeletion::No);
606
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 2502 bin.insert(bin.end(), single_vs.begin(), single_vs.end());
607 2502 return true;
608 }
609
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 5004 }
610 1028 return false;
611 3530 }
612
613 171 Transform singleq_clifford_sweep() {
614 174 return Transform([](Circuit &circ) {
615 174 bool success = false;
616 174 VertexList bin;
617
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 174 std::vector<Vertex> vertices = circ.vertices_in_order();
618
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 16029 for (auto it = vertices.crbegin(); it != vertices.crend(); ++it) {
619 15855 const Vertex &v = *it;
620
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 15855 if (circ.get_OpType_from_Vertex(v) == OpType::CX) {
621
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 4554 for (port_t p = 0; p < 2; p++) {
622 // put both subsequent single qubit sequences into normal form
623 // stuff for obtaining next single qubit subcircuit
624
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 3036 Edge e = circ.get_nth_out_edge(v, p);
625
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 3036 success = singleq_clifford_from_edge(circ, e, bin) || success;
626 }
627 // commute Z, X and whatever else we can through
628
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 1518 Edge e0 = circ.get_nth_out_edge(v, 0);
629
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 1518 Vertex v0 = circ.target(e0);
630
631
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 1518 if (circ.get_OpType_from_Vertex(v0) == OpType::Z) {
632
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 214 circ.remove_vertex(
633 v0, Circuit::GraphRewiring::Yes, Circuit::VertexDeletion::No);
634
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 214 Edge in_e = circ.get_nth_in_edge(v, 0);
635
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 214 circ.rewire(v0, {in_e}, {EdgeType::Quantum});
636 214 success = true;
637
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 214 e0 = circ.get_nth_out_edge(v, 0);
638
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 214 v0 = circ.target(e0);
639 }
640
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 1518 if (circ.get_OpType_from_Vertex(v0) == OpType::X) {
641
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 352 circ.remove_vertex(
642 v0, Circuit::GraphRewiring::Yes, Circuit::VertexDeletion::No);
643
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 352 Edge in_e = circ.get_nth_in_edge(v, 0);
644
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 352 circ.rewire(v0, {in_e}, {EdgeType::Quantum});
645
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 352 Vertex new_v = circ.add_vertex(OpType::X);
646
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 352 in_e = circ.get_nth_in_edge(v, 1);
647
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 352 circ.rewire(new_v, {in_e}, {EdgeType::Quantum});
648 352 success = true;
649
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 352 e0 = circ.get_nth_out_edge(v, 0);
650
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 352 v0 = circ.target(e0);
651 }
652
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 1518 if (circ.get_OpType_from_Vertex(v0) == OpType::S) {
653
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 355 circ.remove_vertex(
654 v0, Circuit::GraphRewiring::Yes, Circuit::VertexDeletion::No);
655
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 355 Edge in_e = circ.get_nth_in_edge(v, 0);
656
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 355 circ.rewire(v0, {in_e}, {EdgeType::Quantum});
657 355 success = true;
658 }
659
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 1518 Edge e1 = circ.get_nth_out_edge(v, 1);
660
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 1518 Vertex v1 = circ.target(e1);
661
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 1518 if (circ.get_OpType_from_Vertex(v1) == OpType::Z) {
662
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 266 circ.remove_vertex(
663 v1, Circuit::GraphRewiring::Yes, Circuit::VertexDeletion::No);
664
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 266 Edge in_e = circ.get_nth_in_edge(v, 1);
665
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 266 circ.rewire(v1, {in_e}, {EdgeType::Quantum});
666
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 266 Vertex new_v = circ.add_vertex(OpType::Z);
667
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 266 in_e = circ.get_nth_in_edge(v, 0);
668
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 266 circ.rewire(new_v, {in_e}, {EdgeType::Quantum});
669 266 success = true;
670
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 266 e1 = circ.get_nth_out_edge(v, 1);
671
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 266 v1 = circ.target(e1);
672 }
673
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 1518 if (circ.get_OpType_from_Vertex(v1) == OpType::X) {
674
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 360 circ.remove_vertex(
675 v1, Circuit::GraphRewiring::Yes, Circuit::VertexDeletion::No);
676
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 360 Edge in_e = circ.get_nth_in_edge(v, 1);
677
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 360 circ.rewire(v1, {in_e}, {EdgeType::Quantum});
678 360 success = true;
679
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 360 e1 = circ.get_nth_out_edge(v, 1);
680
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 360 v1 = circ.target(e1);
681 }
682
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 1518 if (circ.get_OpType_from_Vertex(v1) == OpType::V) {
683
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 164 circ.remove_vertex(
684 v1, Circuit::GraphRewiring::Yes, Circuit::VertexDeletion::No);
685
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 164 Edge in_e = circ.get_nth_in_edge(v, 1);
686
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 164 circ.rewire(v1, {in_e}, {EdgeType::Quantum});
687 164 success = true;
688 }
689 }
690 }
691 // clean up the start of the circuit
692
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 668 for (const Vertex &i : circ.q_inputs()) {
693
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 494 Edge e = circ.get_nth_out_edge(i, 0);
694
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 494 success = singleq_clifford_from_edge(circ, e, bin) || success;
695 174 }
696
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 174 circ.remove_vertices(
697 bin, Circuit::GraphRewiring::No, Circuit::VertexDeletion::Yes);
698 174 return success;
699
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 345 });
700 }
701
702 } // namespace Transforms
703
704 } // namespace tket
705